Lateral double diffused insulated gate field effect transistors (sometimes known as LDMOS transistors) are presently the power devices of choice for integration in very large scale integrated circuit (VLSI) logic processes. The REduced SURface Field (RESURF) design provides a better tradeoff between breakdown voltage and specific on-resistance (r.sub.ds (on)) when compared to conventional LDMOS device designs. As built on a (p-) substrate or epitaxial layer, a RESURF n-channel LDMOS device typically will have an (n) drift region that surrounds an (n+) drain. Relatively thick LOCOS oxide is grown on a portion of the drift region. A relatively deep (p) implant is used to make a (p) body or "DWELL" which spaces the drift region from an (n+) source region that is formed within the (p) body. A (p+) back gate connection is also formed within the (p) body. A conductive gate is formed over and insulated from the (p) body to extend from the source region over the body to the lateral margin of the LOCOS oxide. This gate preferably extends onto a portion of this thicker oxide.
In order to have sufficient ruggedness in handling voltage transients and the like, RESURF LDMOS devices of the class above described conventionally employ a gate oxide thickness of more than 500 Angstroms. For MOS devices having gate oxides thicker than 500 Angstroms, gate driving voltages in excess of 12 volts are required in order to minimize specific on-resistance (r.sub.sp). Where such gate driving voltages are necessary, the charge pumping circuitry needed to generate it occupies a relatively large area on the chip.
The 500+ Angstrom gate oxide employed in conventional RESURF LDMOS devices necessitates an oxide growth step which is different from the gate oxide growth step employed for low-power field effect transistors such as those found in VLSI logic.
Finally, conventional 500-Angstrom RESURF devices require a large V.sub.t of 1.5 to 2 Volts or more in order to be turned off under high temperature conditions and in order to have permissible levels of leakage current in their off state. A need therefore exists for a RESURF LDMOS power transistor that (1) does not require large charge pumping circuitry area, (2) employs a V.sub.t in line with other VLSI devices and (3) is formed by a process that is more compatible with VLSI processes.